Cadence System Design and Verification Blogs

The Internet of Things – the Next Growth Driver, Enabled by High-Level Synthesis?

Jack Erickson — Tue, 14 May 2013 18:51:00 GMT

The electronics industry has enjoyed constant growth while undergoing constant transformation. One of the most significant transformations has been the source of that growth -- from the PC revolution, to the rise of the internet, to mobile computing....(read more)

Creating Virtual Platform Models

jasona — Mon, 29 Apr 2013 21:15:00 GMT

One of the most common questions asked about virtual platforms is: Who creates the models? There are many sources of models and there are people who can make additional models (like Cadence), but obtaining some experience in model creation and virtual...(read more)

What to See at the DATE Conference: High-Level Synthesis

Jack Erickson — Thu, 14 Mar 2013 13:35:00 GMT

The DATE (Design Automation and Test in Europe) Conference is next week (March 18-22, 2013) in Grenoble, France. If you are lucky enough to be in Grenoble at this time of year, it will be worth it to check out Session 11.2 "High-Level Synthesis and...(read more)

System to Silicon Verification – CDNLive Gives a Reality Check on How Hardware and Software Meet

fschirrmeister — Fri, 08 Mar 2013 18:22:00 GMT

Ever since switching from being a hardware/software chip developer to being an enabler with tools in EDA and embedded software, I was part of a team working towards methodologies and tools to improve the interaction of hardware and software. In December...(read more)

Securing Invisible Things … or “Why Denial Works!”

fschirrmeister — Thu, 28 Feb 2013 04:00:00 GMT

The opening keynote of the Embedded World conference in Germany left me with chills. No, it was not a grand theatrical performance letting me crave for more. It simply scared the bejevies out of me with respect to the safety and security of embedded devices...(read more)

Application Specific System-Design and Verification at Embedded World and DVCon

fschirrmeister — Mon, 25 Feb 2013 12:28:00 GMT

This week (February 25 th 2013) is a busy one for system development and the Cadence System Development Suite in particular. For mobility, the place to be is Barcelona -- the Mobile World Congress will show the latest in everything mobile and connected...(read more)

Embedded World 2013: Virtual Platforms Connected to Everything

jasona — Fri, 22 Feb 2013 18:45:00 GMT

Sometimes it is hard to explain why certain ideas take off and why others don’t. There are many stories of poor products that are more successful than much better products. There are also many stories about products that struggle in one time or...(read more)

What the 787 Dreamliner Can Teach Us About SoC design

Jack Erickson — Wed, 20 Feb 2013 19:30:00 GMT

The commercial aircraft industry is at a stage where it innovates at a much slower pace than the chip design industry -- however, we can find some parallels that offer us lessons. The most notably innovative aircraft recently developed is the Boeing 787...(read more)

Why C-to-Silicon Compiler HLS has Supported IEEE 1666-2011 SystemC All Along

Jack Erickson — Thu, 14 Feb 2013 14:00:00 GMT

Recently one of our competitors issued a press release claiming to be the first high-level synthesis (HLS) vendor to support IEEE 1666 TM -2011 SystemC. Specifically mentioned was newly-added support for asynchronous resets in SC_THREADs. Congratulations...(read more)

A Concrete Linux Virtual Platform Example

jasona — Fri, 25 Jan 2013 15:13:00 GMT

Virtual platforms are used to find many different types of system and software issues. Of course, platforms take some time to develop and debug (regardless of what you read in marketing brochures), but in most situations the benefits outweigh the time...(read more)