Analog/Custom Design (Analog/Custom design)

Knowledge Booster Training Bytes - Virtuoso Pin-To-Trunk Routing

Sandhya P S — Wed, 28 Sep 2022 08:40:00 GMT

This blog helps in demonstrating the use of Pin to trunk routing style which helps in enhancing the layout experience.(read more)

Virtuosity: Driving Super-efficient Chip Design with Voltus-XFi Custom Power Integrity Solution

Joy Han — Tue, 30 Aug 2022 13:39:00 GMT

This blog introduces the new Voltus-XFi Custom Power Integrity Solution, a transistor-level EM-IR tool that enables designers to complete comprehensive analysis and debugging easily and quickly.(read more)

Virtuosity: Synergize with CLE - Work Concurrently Across Geographies

Sucharita — Mon, 29 Aug 2022 12:24:00 GMT

Concurrent Layout Editing enables more than one designer to work in a hierarchy at the same time. Check out this blog to know more. (read more)

Virtuoso ICADVM20.1 ISR27 and IC6.1.8 ISR27 Now Available

Virtuoso Release Team — Wed, 24 Aug 2022 11:50:00 GMT

The ICADVM20.1 ISR27 and IC6.1.8 ISR27 production releases are now available for download.(read more)

Virtuoso Meets Maxwell: Completing the Virtuoso RF Solution Assisted Flow

kgjudd — Tue, 16 Aug 2022 11:04:00 GMT

In my last blog, Getting Your Existing SiP File Into Virtuoso RF, I talked about the new enhancements in ICADVM20.1 ISR25 for Virtuoso RF Solution. At the end of the blog, I told you about the Fully Assisted Roundtrip flow, which includes importing SiP files that are compatible with the Virtuoso RF Solution assisted import flow into the Virtuoso platform. Let's examine how the Fully Assisted Roundtrip flow works in this blog.(read more)

Knowledge Booster Training Bytes - Virtuoso Visualization and Analysis XL

Udit Rajput — Wed, 10 Aug 2022 07:13:00 GMT

This blog describes how to efficiently use Virtuoso Visualization and Analysis XL.(read more)

Virtuosity: Custom IC Design Flow/Methodology - Circuit Physical Verification & Parasitic Extraction

Ashish Patni — Fri, 29 Jul 2022 18:26:00 GMT

Read this blog for an overview to the Circuit physical verification and parasitic extraction design stage in the Custom IC Design methodology and the key design steps which can help you achieve this.(read more)

Start Your Engines: An Innovative and Efficient Approach to Debug Interface Elements with SimVision MS

Andre Baguenie — Fri, 29 Jul 2022 04:35:00 GMT

This blog introduces you to an efficient way to debug interface elements or connect modules in a mixed-signal simulation.(read more)

Spectre Tech Tips: Introducing Spectre X EMIR Voltus-XFi

Stefan Wuensche — Fri, 22 Jul 2022 12:25:00 GMT

This blog describes the new capabilities in Spectre 21.1 ISR2 through which it provides support to the Voltus-XFi Custom Power Integrity Solution.(read more)

Virtuoso ICADVM20.1 ISR26 and IC6.1.8 ISR26 Now Available

Virtuoso Release Team — Fri, 08 Jul 2022 13:52:00 GMT

The ICADVM20.1 ISR26 and IC6.1.8 ISR26 production releases are now available for download.(read more)

Knowledge Booster Training Bytes - What Is a Parameterized Cell and What Are the Advantages

Vishnu Teja S — Wed, 06 Jul 2022 15:31:00 GMT

Che(read more)

Start Your Engines: AMS Flex – Our Next Generation Architecture Matures

SRPOH — Wed, 06 Jul 2022 05:05:00 GMT

An AMS Designer Flex simulation gives you the most immediate access to the latest simulation technology on either side, gets out of the way of the core engines and allows the engine performance to shine while providing access to new features. Check out this blog to know more.

(read more)

Spectre Tech Tips: Accuracy 101

Moustafa Moham — Thu, 30 Jun 2022 16:33:00 GMT

In this post, we will learn about the most important parameters for the analog simulators that affect the accuracy of the simulation results. We will also understand how each parameter limits the accuracy of the measurements for the DC and transient analyses.(read more)

Virtuoso Meets Maxwell: Getting Your Existing SiP File Into Virtuoso RF Solution

kgjudd — Tue, 21 Jun 2022 13:44:00 GMT

I have been involved in the Virtuoso RF Solution for the last four years. Most of the customers I work with have a SiP package already in progress. They often ask "How do I get my SiP design into Virtuoso RF Solution?" I am excited about new functionality in the latest ICADVM20.1 ISR25 release. It is a new GUI under the Tools menu called Enablement. (read more)

Virtuosity: Reliability Analysis Report-Reliable Results Made Interactive

Udit Rajput — Thu, 09 Jun 2022 07:47:00 GMT

Read through this blog to know more about the new Reliability Report view in Virtuoso ADE Assembler and Virtuoso ADE Explorer.(read more)