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Semiconductor device

Patent Number: 7675358
Publication Date: 2010-03-09
Inventor: Atsumi, Tomoaki

The invention provides a semiconductor device that generates a clock signal with a fixed pulse width from a carrier. The invention also provides a semiconductor device where data can be obtained accurately from a carrier using a clock signal with a fixed pulse width. Further, the invention provides a semiconductor device that has a simpler circuit configuration and a smaller scale, and consumes less power as compared to the PLL circuit. According to the invention, a signal obtained by ...

Device and method for the demodulation of modulated electric signals

Patent Number: 7671671
Publication Date: 2010-03-02
Inventors: Lustenberger, Felix; Buettgen, Bernhard; Neukom, Simon; Lehmann, Michael; Oggier, Thierry

A demodulation device (1) in semiconductor technology is disclosed. The device (1) is capable of demodulating an injected modulated current. The device (1) comprises an input node (IN1), a sampling stage (DG1, IG1, GS1, IG2, DG2) and at least two output nodes (D1, D2). The sampling stage DG1, IG1, GS1, IG2, DG2) comprises transfer means (GL, GM, GR) for transferring a modulated ...

Device for demodulating a signal containing information being conveyed by phase shift keying

Patent Number: 7671670
Publication Date: 2010-03-02
Inventors: Reverdy, Jacques; Masson, Gilles

The invention relates to a device for demodulating an input signal containing information being conveyed by phase modulation of a carrier wave. A transmitter generates a signal controlling a phase variation in the carrier wave, for each symbol having N cycles, N being an integer strictly greater than 1. The phase variation stretches on the receiver side over n cycles, n being an integer greater than 1 and less than N. The device generates a single pulse for each symbol received suited to ...

Control interface and protocol

Patent Number: 7667534
Publication Date: 2010-02-23
Inventor: Klein, Jonathan

In one embodiment, a method for a control interface includes: receiving a signal conveying bits of information over a single line; and for each bit of information, comparing the proportion of time that the signal on the single line is low versus the proportion of time that the signal on the single line is high for a respective bit period defined from one operative edge of the signal to the next operative edge of the signal in order to determine a logic value for that bit of ...