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		    <title>PatentStorm -&gt; Patents -&gt; Amplifiers</title>
		    <link>http://www.patentstorm.us/rss/class/patents/rss-330.xml</link>
		    <description>Recent patents filings in USPTO Class 330 Amplifiers.</description>
		    <pubDate>Tue, 21 May 2013 16:09:32</pubDate>
		    <managingEditor>patents@patentstorm.us</managingEditor>
		    <language>en</language><atom10:link xmlns:atom10="http://www.w3.org/2005/Atom" rel="self" type="application/rss+xml" href="http://feeds.feedburner.com/Patentstorm-Patents-Amplifiers" /><feedburner:info uri="patentstorm-patents-amplifiers" /><atom10:link xmlns:atom10="http://www.w3.org/2005/Atom" rel="hub" href="http://pubsubhubbub.appspot.com/" /><item>
			         <title><![CDATA[Electronic circuit with a linear amplifier assisted by a switch-mode amplifier]]></title>
			         <link>http://feedproxy.google.com/~r/Patentstorm-Patents-Amplifiers/~3/k54NGavQdpc/description.html</link>
			         <description>&lt;ul&gt;&lt;li&gt;&lt;strong&gt;Patent Number:&lt;/strong&gt; &amp;nbsp;8446221&lt;/li&gt;&lt;li&gt;&lt;strong&gt;Publication Date:&lt;/strong&gt; &amp;nbsp;2013-05-21&lt;/li&gt;&lt;li&gt;&lt;strong&gt;Inventors:&lt;/strong&gt; &amp;nbsp;; &lt;/li&gt;&lt;/ul&gt;
&lt;p&gt;An electronic circuit includes a linear amplifier unit having a first current feedback loop, assisted by a switched-mode amplification unit having a second current feedback loop. The inputs of the two units are connected so that they receive, at the same time, a current setpoint in an operating mode in order to generate a fixed current across a load connected to the output of the units. The first feedback loop includes a first sensor to measure the current in the load, a first subtractor ...&lt;br /&gt;&lt;img src="http://feeds.feedburner.com/~r/Patentstorm-Patents-Amplifiers/~4/k54NGavQdpc" height="1" width="1"/&gt;</description>
			         
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			      <feedburner:origLink>http://www.patentstorm.us/patents/8446221/description.html</feedburner:origLink></item>
<item>
			         <title><![CDATA[Method and apparatus for increasing the effective resolution of a sensor]]></title>
			         <link>http://feedproxy.google.com/~r/Patentstorm-Patents-Amplifiers/~3/1cWcwUbcd1Y/description.html</link>
			         <description>&lt;ul&gt;&lt;li&gt;&lt;strong&gt;Patent Number:&lt;/strong&gt; &amp;nbsp;8446220&lt;/li&gt;&lt;li&gt;&lt;strong&gt;Publication Date:&lt;/strong&gt; &amp;nbsp;2013-05-21&lt;/li&gt;&lt;li&gt;&lt;strong&gt;Inventors:&lt;/strong&gt; &amp;nbsp;; &lt;/li&gt;&lt;/ul&gt;
&lt;p&gt;Methods and devices for increasing a sensor resolution are disclosed. In one example, a two measurement process is used. A first measurement is used to effectively measure across a full range (e.g. 0 to 5 VDC) of the sensor. This first measurement may identify the current operating point of the sensor (e.g. 3.5 VDC). A second measurement may then be made to effectively measure across a sub-range of the sensor that encompasses the current operating point of the sensor (e.g. across a ...&lt;br /&gt;&lt;img src="http://feeds.feedburner.com/~r/Patentstorm-Patents-Amplifiers/~4/1cWcwUbcd1Y" height="1" width="1"/&gt;</description>
			         
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			      <feedburner:origLink>http://www.patentstorm.us/patents/8446220/description.html</feedburner:origLink></item>
<item>
			         <title><![CDATA[Class-G line driver control signal]]></title>
			         <link>http://feedproxy.google.com/~r/Patentstorm-Patents-Amplifiers/~3/Hu1s-6rdaOQ/description.html</link>
			         <description>&lt;ul&gt;&lt;li&gt;&lt;strong&gt;Patent Number:&lt;/strong&gt; &amp;nbsp;8446219&lt;/li&gt;&lt;li&gt;&lt;strong&gt;Publication Date:&lt;/strong&gt; &amp;nbsp;2013-05-21&lt;/li&gt;&lt;li&gt;&lt;strong&gt;Inventors:&lt;/strong&gt; &amp;nbsp;; &lt;/li&gt;&lt;/ul&gt;
&lt;p&gt;An apparatus comprising an input, a control signal generator coupled to the input and having a control signal generator output, and an amplifier coupled to the control signal generator output, wherein a voltage supplied to the amplifier is switched based on the control signal generator output, and wherein the control signal generator output is based on a data signal in the input. Also included is an apparatus comprising circuitry configured to implement a method comprising detecting an ...&lt;br /&gt;&lt;img src="http://feeds.feedburner.com/~r/Patentstorm-Patents-Amplifiers/~4/Hu1s-6rdaOQ" height="1" width="1"/&gt;</description>
			         
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			      <feedburner:origLink>http://www.patentstorm.us/patents/8446219/description.html</feedburner:origLink></item>
<item>
			         <title><![CDATA[Power amplifier and transmitter]]></title>
			         <link>http://feedproxy.google.com/~r/Patentstorm-Patents-Amplifiers/~3/kVsgWeLsAwE/description.html</link>
			         <description>&lt;ul&gt;&lt;li&gt;&lt;strong&gt;Patent Number:&lt;/strong&gt; &amp;nbsp;8446218&lt;/li&gt;&lt;li&gt;&lt;strong&gt;Publication Date:&lt;/strong&gt; &amp;nbsp;2013-05-21&lt;/li&gt;&lt;li&gt;&lt;strong&gt;Inventor:&lt;/strong&gt; &amp;nbsp;&lt;/li&gt;&lt;/ul&gt;
&lt;p&gt;A power amplifier is provided, which includes a power dividing unit, a first power amplification tributary, a second power amplification tributary, and an impedance conversion unit. Input ends of the first power amplification tributary and the second power amplification tributary are coupled to two output ends of the power dividing unit respectively. An output end of the first power amplification tributary is coupled to an output end of the second power amplification tributary through the ...&lt;br /&gt;&lt;img src="http://feeds.feedburner.com/~r/Patentstorm-Patents-Amplifiers/~4/kVsgWeLsAwE" height="1" width="1"/&gt;</description>
			         
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			      <feedburner:origLink>http://www.patentstorm.us/patents/8446218/description.html</feedburner:origLink></item>
<item>
			         <title><![CDATA[Dual-loop feedback amplifying circuit]]></title>
			         <link>http://feedproxy.google.com/~r/Patentstorm-Patents-Amplifiers/~3/mPRhY-3sDok/description.html</link>
			         <description>&lt;ul&gt;&lt;li&gt;&lt;strong&gt;Patent Number:&lt;/strong&gt; &amp;nbsp;8446217&lt;/li&gt;&lt;li&gt;&lt;strong&gt;Publication Date:&lt;/strong&gt; &amp;nbsp;2013-05-21&lt;/li&gt;&lt;li&gt;&lt;strong&gt;Inventor:&lt;/strong&gt; &amp;nbsp;&lt;/li&gt;&lt;/ul&gt;
&lt;p&gt;An amplifying circuit arranged for converting an input signal into an amplified output signal comprising: an input node (&lt;b&gt;11&lt;/b&gt;) at an input side of said circuit for receiving said input signal (pi); an output node (&lt;b&gt;9&lt;/b&gt;) at an output side of said circuit for outputting said amplified output signal (io); a first gain element (M&lt;b&gt;1&lt;/b&gt;) connected between said input and output nodes and provided for converting an input voltage taken from said input signal into a current for forming ...&lt;br /&gt;&lt;img src="http://feeds.feedburner.com/~r/Patentstorm-Patents-Amplifiers/~4/mPRhY-3sDok" height="1" width="1"/&gt;</description>
			         
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			      <feedburner:origLink>http://www.patentstorm.us/patents/8446217/description.html</feedburner:origLink></item>
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			         <title><![CDATA[Anti-pop circuit]]></title>
			         <link>http://feedproxy.google.com/~r/Patentstorm-Patents-Amplifiers/~3/pCrhK4nMtZA/description.html</link>
			         <description>&lt;ul&gt;&lt;li&gt;&lt;strong&gt;Patent Number:&lt;/strong&gt; &amp;nbsp;8446216&lt;/li&gt;&lt;li&gt;&lt;strong&gt;Publication Date:&lt;/strong&gt; &amp;nbsp;2013-05-21&lt;/li&gt;&lt;li&gt;&lt;strong&gt;Inventors:&lt;/strong&gt; &amp;nbsp;; &lt;/li&gt;&lt;/ul&gt;
&lt;p&gt;Presently many audio chips suffer from pop issues, which is especially serious for single ended audio drivers. An audio pop is a disturbance in the output caused by a sudden transition of chip power, particularly when a chip is powered on or powered off. Furthermore, compensation networks included in the amplifiers on audio chips for stability offer a significant path for transmitting power disturbances to the output. Hence, circuitry is developed to suppress pops in the output stages of an ...&lt;br /&gt;&lt;img src="http://feeds.feedburner.com/~r/Patentstorm-Patents-Amplifiers/~4/pCrhK4nMtZA" height="1" width="1"/&gt;</description>
			         
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			      <feedburner:origLink>http://www.patentstorm.us/patents/8446216/description.html</feedburner:origLink></item>
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			         <title><![CDATA[Broadband linearization by elimination of harmonics and intermodulation in amplifiers]]></title>
			         <link>http://feedproxy.google.com/~r/Patentstorm-Patents-Amplifiers/~3/2bpKLmS-bEg/description.html</link>
			         <description>&lt;ul&gt;&lt;li&gt;&lt;strong&gt;Patent Number:&lt;/strong&gt; &amp;nbsp;8441322&lt;/li&gt;&lt;li&gt;&lt;strong&gt;Publication Date:&lt;/strong&gt; &amp;nbsp;2013-05-14&lt;/li&gt;&lt;li&gt;&lt;strong&gt;Inventor:&lt;/strong&gt; &amp;nbsp;&lt;/li&gt;&lt;/ul&gt;
&lt;p&gt;An amplifier device includes an initial amplifier stage configured to receive a differential input signal at a first leg and a second leg; a final amplifier stage coupled to outputs of the initial amplifier stage, the final amplifier stage including a primary signal amplifier and an error amplifier in each of the first and second legs; and wherein an output of the error amplifier of the first leg is combined with an output of the primary signal amplifier in the second leg, and an output of ...&lt;br /&gt;&lt;img src="http://feeds.feedburner.com/~r/Patentstorm-Patents-Amplifiers/~4/2bpKLmS-bEg" height="1" width="1"/&gt;</description>
			         
			         <guid isPermaLink="false">8441322</guid>
			
			      <feedburner:origLink>http://www.patentstorm.us/patents/8441322/description.html</feedburner:origLink></item>
<item>
			         <title><![CDATA[Multi-stage amplifier]]></title>
			         <link>http://feedproxy.google.com/~r/Patentstorm-Patents-Amplifiers/~3/aBd8j1XpfFU/description.html</link>
			         <description>&lt;ul&gt;&lt;li&gt;&lt;strong&gt;Patent Number:&lt;/strong&gt; &amp;nbsp;8441321&lt;/li&gt;&lt;li&gt;&lt;strong&gt;Publication Date:&lt;/strong&gt; &amp;nbsp;2013-05-14&lt;/li&gt;&lt;li&gt;&lt;strong&gt;Inventor:&lt;/strong&gt; &amp;nbsp;&lt;/li&gt;&lt;/ul&gt;
&lt;p&gt;The disclosed multi-stage amplifier (&lt;b&gt;200&lt;/b&gt;) comprises several amplifier stages (&lt;b&gt;201&lt;/b&gt;-&lt;b&gt;203&lt;/b&gt;) which, together with an output network, form different branches. A first branch comprises a first and a second amplifier (&lt;b&gt;201, 202&lt;/b&gt;) having their outputs connected to each other via a quarter-wave transmission line. The first branch is connected to a load via a first offset-transmission-line (&lt;b&gt;0.1&lt;/b&gt;). A second branch comprises a third amplifier stage (&lt;b&gt;203&lt;/b&gt;) and a ...&lt;br /&gt;&lt;img src="http://feeds.feedburner.com/~r/Patentstorm-Patents-Amplifiers/~4/aBd8j1XpfFU" height="1" width="1"/&gt;</description>
			         
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			         <title><![CDATA[Cancelation of gain change due to amplifier self-heating]]></title>
			         <link>http://feedproxy.google.com/~r/Patentstorm-Patents-Amplifiers/~3/LianTtcePRA/description.html</link>
			         <description>&lt;ul&gt;&lt;li&gt;&lt;strong&gt;Patent Number:&lt;/strong&gt; &amp;nbsp;8441320&lt;/li&gt;&lt;li&gt;&lt;strong&gt;Publication Date:&lt;/strong&gt; &amp;nbsp;2013-05-14&lt;/li&gt;&lt;li&gt;&lt;strong&gt;Inventors:&lt;/strong&gt; &amp;nbsp;; ; &lt;/li&gt;&lt;/ul&gt;
&lt;p&gt;A system includes a power amplifier, a preamplifier, a first temperature sensor, and a bias generator. The power amplifier has a first gain, which is a function of a temperature of the power amplifier. The preamplifier has a second gain, amplifies an input signal, and outputs an amplified signal to the power amplifier. The first temperature sensor senses the temperature and generates a first signal. The bias generator generates a first biasing signal to bias the power amplifier, generates a ...&lt;br /&gt;&lt;img src="http://feeds.feedburner.com/~r/Patentstorm-Patents-Amplifiers/~4/LianTtcePRA" height="1" width="1"/&gt;</description>
			         
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			      <feedburner:origLink>http://www.patentstorm.us/patents/8441320/description.html</feedburner:origLink></item>
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			         <title><![CDATA[Method and apparatus for biasing rail to rail DMOS amplifier output stage]]></title>
			         <link>http://feedproxy.google.com/~r/Patentstorm-Patents-Amplifiers/~3/OZzNvc0J2qs/description.html</link>
			         <description>&lt;ul&gt;&lt;li&gt;&lt;strong&gt;Patent Number:&lt;/strong&gt; &amp;nbsp;8441319&lt;/li&gt;&lt;li&gt;&lt;strong&gt;Publication Date:&lt;/strong&gt; &amp;nbsp;2013-05-14&lt;/li&gt;&lt;li&gt;&lt;strong&gt;Inventor:&lt;/strong&gt; &amp;nbsp;&lt;/li&gt;&lt;/ul&gt;
&lt;p&gt;An amplifier comprises: an input stage for receiving incoming signals; a high gain stage coupled to the input stage and providing driving signals in response to the incoming signals to an output driver stage; and an output terminal coupled to the output driver stage. The output driver stage comprises a high side driver circuit having a first terminal receiving a first driving signal pdrive from the high gain stage, a second terminal coupled VDD through a first voltage drop, and a third ...&lt;br /&gt;&lt;img src="http://feeds.feedburner.com/~r/Patentstorm-Patents-Amplifiers/~4/OZzNvc0J2qs" height="1" width="1"/&gt;</description>
			         
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			      <feedburner:origLink>http://www.patentstorm.us/patents/8441319/description.html</feedburner:origLink></item>
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			         <title><![CDATA[Push-pull low noise amplifier with variable gain, push-pull low noise amplifier with common gate bias circuit and amplifier with auxiliary matching]]></title>
			         <link>http://feedproxy.google.com/~r/Patentstorm-Patents-Amplifiers/~3/cyi4fWyqiU8/description.html</link>
			         <description>&lt;ul&gt;&lt;li&gt;&lt;strong&gt;Patent Number:&lt;/strong&gt; &amp;nbsp;8441318&lt;/li&gt;&lt;li&gt;&lt;strong&gt;Publication Date:&lt;/strong&gt; &amp;nbsp;2013-05-14&lt;/li&gt;&lt;li&gt;&lt;strong&gt;Inventors:&lt;/strong&gt; &amp;nbsp;; &lt;/li&gt;&lt;/ul&gt;
&lt;p&gt;A push-pull low noise amplifier (LNA) includes at least one amplifier block. Each amplifier block includes a bypass stage and at least one gain cell. The bypass stage has a first node and a second node. The gain cell has an input terminal and an output terminal, comprising a loading stage and a driving stage. When the push-pull LNA is in a first gain mode, the loading stage is enabled and the bypassing stage is disabled; and when the push-pull LNA is in a second gain mode, the loading stage ...&lt;br /&gt;&lt;img src="http://feeds.feedburner.com/~r/Patentstorm-Patents-Amplifiers/~4/cyi4fWyqiU8" height="1" width="1"/&gt;</description>
			         
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			         <title><![CDATA[Tapered-impedance distributed switching power amplifier]]></title>
			         <link>http://feedproxy.google.com/~r/Patentstorm-Patents-Amplifiers/~3/BlMy-aUYkcQ/description.html</link>
			         <description>&lt;ul&gt;&lt;li&gt;&lt;strong&gt;Patent Number:&lt;/strong&gt; &amp;nbsp;8441317&lt;/li&gt;&lt;li&gt;&lt;strong&gt;Publication Date:&lt;/strong&gt; &amp;nbsp;2013-05-14&lt;/li&gt;&lt;li&gt;&lt;strong&gt;Inventors:&lt;/strong&gt; &amp;nbsp;; ; ; &lt;/li&gt;&lt;/ul&gt;
&lt;p&gt;A distributed power amplifier may include a plurality of switching power amplifier sub-circuits, and a plurality of connection network sub-circuits, each of the plurality connection network sub-circuits having a characteristic impedance, wherein each of the plurality of connection network sub-circuits combines two or more of the plurality of switching power amplifier sub-circuits into a parallel or series configuration, wherein the plurality of switching power amplifier sub-circuits, the ...&lt;br /&gt;&lt;img src="http://feeds.feedburner.com/~r/Patentstorm-Patents-Amplifiers/~4/BlMy-aUYkcQ" height="1" width="1"/&gt;</description>
			         
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			         <title><![CDATA[Switching supply circuits and methods]]></title>
			         <link>http://feedproxy.google.com/~r/Patentstorm-Patents-Amplifiers/~3/5xr8lcjzju0/description.html</link>
			         <description>&lt;ul&gt;&lt;li&gt;&lt;strong&gt;Patent Number:&lt;/strong&gt; &amp;nbsp;8441316&lt;/li&gt;&lt;li&gt;&lt;strong&gt;Publication Date:&lt;/strong&gt; &amp;nbsp;2013-05-14&lt;/li&gt;&lt;li&gt;&lt;strong&gt;Inventor:&lt;/strong&gt; &amp;nbsp;&lt;/li&gt;&lt;/ul&gt;
&lt;p&gt;In one embodiment the present invention includes a switching circuit. The circuit comprises a first transistor, a second transistor, and a boost circuit. The first transistor couples a first power source to a first intermediate node during a first phase of operation and the second transistor couples a second intermediate node to the first intermediate node during a second phase of operation. The boost circuit is coupled to the second intermediate node and provides a second power source by a ...&lt;br /&gt;&lt;img src="http://feeds.feedburner.com/~r/Patentstorm-Patents-Amplifiers/~4/5xr8lcjzju0" height="1" width="1"/&gt;</description>
			         
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			         <title><![CDATA[Analog circuit and display device and electronic device]]></title>
			         <link>http://feedproxy.google.com/~r/Patentstorm-Patents-Amplifiers/~3/FxQPMJUh3Sc/description.html</link>
			         <description>&lt;ul&gt;&lt;li&gt;&lt;strong&gt;Patent Number:&lt;/strong&gt; &amp;nbsp;8441315&lt;/li&gt;&lt;li&gt;&lt;strong&gt;Publication Date:&lt;/strong&gt; &amp;nbsp;2013-05-14&lt;/li&gt;&lt;li&gt;&lt;strong&gt;Inventor:&lt;/strong&gt; &amp;nbsp;&lt;/li&gt;&lt;/ul&gt;
&lt;p&gt;The invention provides an analog circuit that decreases an effect of variation of a transistor. By flowing a bias current in a compensation operation, a voltage between the gate and source of the transistor to be compensated is held in a capacitor. In a normal operation, the voltage stored in the compensation operation is added to a signal voltage. As the capacitor holds the voltage according to the characteristics of the transistor to be compensated, the effect of variation can be ...&lt;br /&gt;&lt;img src="http://feeds.feedburner.com/~r/Patentstorm-Patents-Amplifiers/~4/FxQPMJUh3Sc" height="1" width="1"/&gt;</description>
			         
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			         <title><![CDATA[Apparatus and method for low noise amplification]]></title>
			         <link>http://feedproxy.google.com/~r/Patentstorm-Patents-Amplifiers/~3/hYinQeM93D8/description.html</link>
			         <description>&lt;ul&gt;&lt;li&gt;&lt;strong&gt;Patent Number:&lt;/strong&gt; &amp;nbsp;8436684&lt;/li&gt;&lt;li&gt;&lt;strong&gt;Publication Date:&lt;/strong&gt; &amp;nbsp;2013-05-07&lt;/li&gt;&lt;li&gt;&lt;strong&gt;Inventors:&lt;/strong&gt; &amp;nbsp;; &lt;/li&gt;&lt;/ul&gt;
&lt;p&gt;Embodiments provide an amplifier and a method for using and manufacturing said amplifier that incorporate an impedance matching stage, a feedback circuit, and a gain stage. The impedance matching stage is coupled to the feedback circuit wherein the feedback circuit provides a compensated second bias voltage for the impedance matching stage. The output of the impedance matching stage is used to set an input bias voltage for both the impedance matching stage and the gain stage. The output of ...&lt;br /&gt;&lt;img src="http://feeds.feedburner.com/~r/Patentstorm-Patents-Amplifiers/~4/hYinQeM93D8" height="1" width="1"/&gt;</description>
			         
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			         <title><![CDATA[High efficiency audio amplifier]]></title>
			         <link>http://feedproxy.google.com/~r/Patentstorm-Patents-Amplifiers/~3/lOQxfMJeMv8/description.html</link>
			         <description>&lt;ul&gt;&lt;li&gt;&lt;strong&gt;Patent Number:&lt;/strong&gt; &amp;nbsp;8436683&lt;/li&gt;&lt;li&gt;&lt;strong&gt;Publication Date:&lt;/strong&gt; &amp;nbsp;2013-05-07&lt;/li&gt;&lt;li&gt;&lt;strong&gt;Inventor:&lt;/strong&gt; &amp;nbsp;&lt;/li&gt;&lt;/ul&gt;
&lt;p&gt;An audio amplifier circuit is described which comprises an operational amplifier. The operational amplifier receives an audio input signal and provides an output suitable for connecting a headphone, or a loudspeaker. A step-up converter is provided which supplies the operational amplifier. The audio amplifier is configured to operate in one of multiple operating modes, each of which uses a distinct supply voltage Vcc of the operational amplifier in the audio amplifier. Comparators are used ...&lt;br /&gt;&lt;img src="http://feeds.feedburner.com/~r/Patentstorm-Patents-Amplifiers/~4/lOQxfMJeMv8" height="1" width="1"/&gt;</description>
			         
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			         <title><![CDATA[Fourth-order electrical current source apparatus, systems and methods]]></title>
			         <link>http://feedproxy.google.com/~r/Patentstorm-Patents-Amplifiers/~3/qgyRUlxxxpU/description.html</link>
			         <description>&lt;ul&gt;&lt;li&gt;&lt;strong&gt;Patent Number:&lt;/strong&gt; &amp;nbsp;8436682&lt;/li&gt;&lt;li&gt;&lt;strong&gt;Publication Date:&lt;/strong&gt; &amp;nbsp;2013-05-07&lt;/li&gt;&lt;li&gt;&lt;strong&gt;Inventors:&lt;/strong&gt; &amp;nbsp;; &lt;/li&gt;&lt;/ul&gt;
&lt;p&gt;Apparatus and methods disclosed herein operate to receive a differential input signal at a first-stage pair of transconductance devices. The differential signal is amplified by a second-order factor at a positive-side or a negative-side first-stage transconductance device, depending upon the polarity of the differential input signal, to create a second-order signal at the output of the appropriate first-stage device. The second-order output signal is then amplified by another second-order ...&lt;br /&gt;&lt;img src="http://feeds.feedburner.com/~r/Patentstorm-Patents-Amplifiers/~4/qgyRUlxxxpU" height="1" width="1"/&gt;</description>
			         
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			      <feedburner:origLink>http://www.patentstorm.us/patents/8436682/description.html</feedburner:origLink></item>
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			         <title><![CDATA[Voltage regulation circuit]]></title>
			         <link>http://feedproxy.google.com/~r/Patentstorm-Patents-Amplifiers/~3/u91la_Y_n0U/description.html</link>
			         <description>&lt;ul&gt;&lt;li&gt;&lt;strong&gt;Patent Number:&lt;/strong&gt; &amp;nbsp;8436681&lt;/li&gt;&lt;li&gt;&lt;strong&gt;Publication Date:&lt;/strong&gt; &amp;nbsp;2013-05-07&lt;/li&gt;&lt;li&gt;&lt;strong&gt;Inventor:&lt;/strong&gt; &amp;nbsp;&lt;/li&gt;&lt;/ul&gt;
&lt;p&gt;A voltage regulating circuit includes a pulse width modulation controller, a current sense circuit, a voltage feedback circuit, and a gain-and-bias circuit. The current sense circuit includes an inductor and a capacitor. The voltage feedback circuit includes first and second resistors. The gain-and-bias circuit includes an operational amplifier. A first terminal of the capacitor is connected to an inverting input terminal of the operational amplifier through a third resistor. A second ...&lt;br /&gt;&lt;img src="http://feeds.feedburner.com/~r/Patentstorm-Patents-Amplifiers/~4/u91la_Y_n0U" height="1" width="1"/&gt;</description>
			         
			         <guid isPermaLink="false">8436681</guid>
			
			      <feedburner:origLink>http://www.patentstorm.us/patents/8436681/description.html</feedburner:origLink></item>
<item>
			         <title><![CDATA[Power control circuit for radio frequency power amplifiers]]></title>
			         <link>http://feedproxy.google.com/~r/Patentstorm-Patents-Amplifiers/~3/og1Ya3I3doE/description.html</link>
			         <description>&lt;ul&gt;&lt;li&gt;&lt;strong&gt;Patent Number:&lt;/strong&gt; &amp;nbsp;8432228&lt;/li&gt;&lt;li&gt;&lt;strong&gt;Publication Date:&lt;/strong&gt; &amp;nbsp;2013-04-30&lt;/li&gt;&lt;li&gt;&lt;strong&gt;Inventor:&lt;/strong&gt; &amp;nbsp;&lt;/li&gt;&lt;/ul&gt;
&lt;p&gt;A power control circuit for regulating an output voltage applied to a radio frequency power amplifier. The power control circuit includes an amplifier, a pass transistor and one or more saturation detectors. An input ramp voltage having a magnitude equal to a first voltage level is applied to a negative terminal of the amplifier. The pass transistor provides an output voltage at a drain terminal of the pass transistor. The saturation detector detects a magnitude of a voltage at a gate ...&lt;br /&gt;&lt;img src="http://feeds.feedburner.com/~r/Patentstorm-Patents-Amplifiers/~4/og1Ya3I3doE" height="1" width="1"/&gt;</description>
			         
			         <guid isPermaLink="false">8432228</guid>
			
			      <feedburner:origLink>http://www.patentstorm.us/patents/8432228/description.html</feedburner:origLink></item>
<item>
			         <title><![CDATA[Power amplifier]]></title>
			         <link>http://feedproxy.google.com/~r/Patentstorm-Patents-Amplifiers/~3/X-7tVpJTvs0/description.html</link>
			         <description>&lt;ul&gt;&lt;li&gt;&lt;strong&gt;Patent Number:&lt;/strong&gt; &amp;nbsp;8432227&lt;/li&gt;&lt;li&gt;&lt;strong&gt;Publication Date:&lt;/strong&gt; &amp;nbsp;2013-04-30&lt;/li&gt;&lt;li&gt;&lt;strong&gt;Inventor:&lt;/strong&gt; &amp;nbsp;&lt;/li&gt;&lt;/ul&gt;
&lt;p&gt;A power amplifier includes: an amplifying element having a base into which input signals are inputted, a collector to which a collector voltage is applied, and an emitter; and a bias circuit supplying a bias current to the base of the amplifying element. The bias circuit includes a bias current lowering circuit which lowers the bias current when the collector voltage is lower than a prescribed threshold ...&lt;br /&gt;&lt;img src="http://feeds.feedburner.com/~r/Patentstorm-Patents-Amplifiers/~4/X-7tVpJTvs0" height="1" width="1"/&gt;</description>
			         
			         <guid isPermaLink="false">8432227</guid>
			
			      <feedburner:origLink>http://www.patentstorm.us/patents/8432227/description.html</feedburner:origLink></item>
<item>
			         <title><![CDATA[Amplifier circuits and methods for cancelling Miller capacitance]]></title>
			         <link>http://feedproxy.google.com/~r/Patentstorm-Patents-Amplifiers/~3/7ttFvFG9Jfo/description.html</link>
			         <description>&lt;ul&gt;&lt;li&gt;&lt;strong&gt;Patent Number:&lt;/strong&gt; &amp;nbsp;8432226&lt;/li&gt;&lt;li&gt;&lt;strong&gt;Publication Date:&lt;/strong&gt; &amp;nbsp;2013-04-30&lt;/li&gt;&lt;li&gt;&lt;strong&gt;Inventor:&lt;/strong&gt; &amp;nbsp;&lt;/li&gt;&lt;/ul&gt;
&lt;p&gt;An amplifier circuit has an input stage, a current mirror stage, and an output stage. The output stage has a transistor for which a non-linear and/or linear Miller capacitance exists across the transistor. A capacitive element, referred to herein as a “negative Miller capacitor,” is coupled between an input node of the current mirror stage and the transistor's collector or drain causing the current flowing through the negative Miller capacitor to be inverted, supplying the current taken ...&lt;br /&gt;&lt;img src="http://feeds.feedburner.com/~r/Patentstorm-Patents-Amplifiers/~4/7ttFvFG9Jfo" height="1" width="1"/&gt;</description>
			         
			         <guid isPermaLink="false">8432226</guid>
			
			      <feedburner:origLink>http://www.patentstorm.us/patents/8432226/description.html</feedburner:origLink></item>
<item>
			         <title><![CDATA[Automatic gain control]]></title>
			         <link>http://feedproxy.google.com/~r/Patentstorm-Patents-Amplifiers/~3/gpDlqJTTOCc/description.html</link>
			         <description>&lt;ul&gt;&lt;li&gt;&lt;strong&gt;Patent Number:&lt;/strong&gt; &amp;nbsp;8432225&lt;/li&gt;&lt;li&gt;&lt;strong&gt;Publication Date:&lt;/strong&gt; &amp;nbsp;2013-04-30&lt;/li&gt;&lt;li&gt;&lt;strong&gt;Inventors:&lt;/strong&gt; &amp;nbsp;; &lt;/li&gt;&lt;/ul&gt;
&lt;p&gt;This document discusses, among other things, a system and method for receiving an input signal and power supply information, and amplifying the input signal by a gain value determined as a function of the power supply ...&lt;br /&gt;&lt;img src="http://feeds.feedburner.com/~r/Patentstorm-Patents-Amplifiers/~4/gpDlqJTTOCc" height="1" width="1"/&gt;</description>
			         
			         <guid isPermaLink="false">8432225</guid>
			
			      <feedburner:origLink>http://www.patentstorm.us/patents/8432225/description.html</feedburner:origLink></item>
<item>
			         <title><![CDATA[Power amplifier with back-off efficiency]]></title>
			         <link>http://feedproxy.google.com/~r/Patentstorm-Patents-Amplifiers/~3/pfdo0F14Zas/description.html</link>
			         <description>&lt;ul&gt;&lt;li&gt;&lt;strong&gt;Patent Number:&lt;/strong&gt; &amp;nbsp;8432224&lt;/li&gt;&lt;li&gt;&lt;strong&gt;Publication Date:&lt;/strong&gt; &amp;nbsp;2013-04-30&lt;/li&gt;&lt;li&gt;&lt;strong&gt;Inventors:&lt;/strong&gt; &amp;nbsp;; ; ; ; &lt;/li&gt;&lt;/ul&gt;
&lt;p&gt;A power amplifier system is provided with a signal path including driver stages and output stages. A power control element has one or more control ports and uses one or more nonlinear control ...&lt;br /&gt;&lt;img src="http://feeds.feedburner.com/~r/Patentstorm-Patents-Amplifiers/~4/pfdo0F14Zas" height="1" width="1"/&gt;</description>
			         
			         <guid isPermaLink="false">8432224</guid>
			
			      <feedburner:origLink>http://www.patentstorm.us/patents/8432224/description.html</feedburner:origLink></item>
<item>
			         <title><![CDATA[Differential amplifier circuit]]></title>
			         <link>http://feedproxy.google.com/~r/Patentstorm-Patents-Amplifiers/~3/ifKpESkG4XM/description.html</link>
			         <description>&lt;ul&gt;&lt;li&gt;&lt;strong&gt;Patent Number:&lt;/strong&gt; &amp;nbsp;8432223&lt;/li&gt;&lt;li&gt;&lt;strong&gt;Publication Date:&lt;/strong&gt; &amp;nbsp;2013-04-30&lt;/li&gt;&lt;li&gt;&lt;strong&gt;Inventor:&lt;/strong&gt; &amp;nbsp;&lt;/li&gt;&lt;/ul&gt;
&lt;p&gt;A differential amplifier circuit can reduce consumption current and the circuit size while improving a power supply rejection ratio. The differential amplifier circuit includes a power supply line and an input part that includes an input circuit and an active load. The input circuit includes two differential input elements, and the active load includes two transistors connected to the two differential input elements. The input part generates a differential signal in response to an input ...&lt;br /&gt;&lt;img src="http://feeds.feedburner.com/~r/Patentstorm-Patents-Amplifiers/~4/ifKpESkG4XM" height="1" width="1"/&gt;</description>
			         
			         <guid isPermaLink="false">8432223</guid>
			
			      <feedburner:origLink>http://www.patentstorm.us/patents/8432223/description.html</feedburner:origLink></item>
<item>
			         <title><![CDATA[Apparatus and methods for electronic amplification]]></title>
			         <link>http://feedproxy.google.com/~r/Patentstorm-Patents-Amplifiers/~3/ZnH1CiXbTuU/description.html</link>
			         <description>&lt;ul&gt;&lt;li&gt;&lt;strong&gt;Patent Number:&lt;/strong&gt; &amp;nbsp;8432222&lt;/li&gt;&lt;li&gt;&lt;strong&gt;Publication Date:&lt;/strong&gt; &amp;nbsp;2013-04-30&lt;/li&gt;&lt;li&gt;&lt;strong&gt;Inventor:&lt;/strong&gt; &amp;nbsp;&lt;/li&gt;&lt;/ul&gt;
&lt;p&gt;Apparatus and methods for electronic amplification are provided. In one embodiment, an amplifier includes a first adaptive level shifter (ALS), a second ALS, a first transconductance amplification circuit, a second transconductance amplification circuit, and a transimpedance amplification circuit. The first ALS and the second ALS are electrically coupled to the first and second transconductance amplification circuits to improve the input voltage range and common-mode rejection ratio (CMRR) ...&lt;br /&gt;&lt;img src="http://feeds.feedburner.com/~r/Patentstorm-Patents-Amplifiers/~4/ZnH1CiXbTuU" height="1" width="1"/&gt;</description>
			         
			         <guid isPermaLink="false">8432222</guid>
			
			      <feedburner:origLink>http://www.patentstorm.us/patents/8432222/description.html</feedburner:origLink></item>
<item>
			         <title><![CDATA[Switching amplifying method and switching amplifier]]></title>
			         <link>http://feedproxy.google.com/~r/Patentstorm-Patents-Amplifiers/~3/ZqL8XnI-26I/description.html</link>
			         <description>&lt;ul&gt;&lt;li&gt;&lt;strong&gt;Patent Number:&lt;/strong&gt; &amp;nbsp;8432221&lt;/li&gt;&lt;li&gt;&lt;strong&gt;Publication Date:&lt;/strong&gt; &amp;nbsp;2013-04-30&lt;/li&gt;&lt;li&gt;&lt;strong&gt;Inventor:&lt;/strong&gt; &amp;nbsp;&lt;/li&gt;&lt;/ul&gt;
&lt;p&gt;A switching amplifying method or a switching amplifier for obtaining one or more than one linearly amplified replicas of an input signal, is highly efficient, and does not have the disadvantage of “dead time” problem related to the class D amplifiers. Said switching amplifying method comprises the steps of: receiving and pulse modulating the input signal for getting a pulse modulated signal; switching a first pulsed voltage from a DC voltage supply unit according to the pulse modulated ...&lt;br /&gt;&lt;img src="http://feeds.feedburner.com/~r/Patentstorm-Patents-Amplifiers/~4/ZqL8XnI-26I" height="1" width="1"/&gt;</description>
			         
			         <guid isPermaLink="false">8432221</guid>
			
			      <feedburner:origLink>http://www.patentstorm.us/patents/8432221/description.html</feedburner:origLink></item>
<item>
			         <title><![CDATA[Linearization device for a power amplifier]]></title>
			         <link>http://feedproxy.google.com/~r/Patentstorm-Patents-Amplifiers/~3/_uKhuv8Bsl8/description.html</link>
			         <description>&lt;ul&gt;&lt;li&gt;&lt;strong&gt;Patent Number:&lt;/strong&gt; &amp;nbsp;8432220&lt;/li&gt;&lt;li&gt;&lt;strong&gt;Publication Date:&lt;/strong&gt; &amp;nbsp;2013-04-30&lt;/li&gt;&lt;li&gt;&lt;strong&gt;Inventors:&lt;/strong&gt; &amp;nbsp;; &lt;/li&gt;&lt;/ul&gt;
&lt;p&gt;A linearization device for a power amplifier using adaptive digital baseband predistortion includes a pre-inverse block receiving a complex discretized input signal {tilde over (x)}&lt;sub&gt;e&lt;/sub&gt;(n) and restoring a complex predistorted signal {tilde over (x)}&lt;sub&gt;p&lt;/sub&gt;(n) at the power amplifier input. The pre-inverse block includes a first module and a second module receiving the modulus of the complex input signal |{tilde over (x)}&lt;sub&gt;e&lt;/sub&gt;(n)| at the input whose value is included in an ...&lt;br /&gt;&lt;img src="http://feeds.feedburner.com/~r/Patentstorm-Patents-Amplifiers/~4/_uKhuv8Bsl8" height="1" width="1"/&gt;</description>
			         
			         <guid isPermaLink="false">8432220</guid>
			
			      <feedburner:origLink>http://www.patentstorm.us/patents/8432220/description.html</feedburner:origLink></item>
<item>
			         <title><![CDATA[Amplitude control system and method for communication systems]]></title>
			         <link>http://feedproxy.google.com/~r/Patentstorm-Patents-Amplifiers/~3/i8awN91SEss/description.html</link>
			         <description>&lt;ul&gt;&lt;li&gt;&lt;strong&gt;Patent Number:&lt;/strong&gt; &amp;nbsp;8432219&lt;/li&gt;&lt;li&gt;&lt;strong&gt;Publication Date:&lt;/strong&gt; &amp;nbsp;2013-04-30&lt;/li&gt;&lt;li&gt;&lt;strong&gt;Inventor:&lt;/strong&gt; &amp;nbsp;&lt;/li&gt;&lt;/ul&gt;
&lt;p&gt;An amplitude control system including one or more multi-element array power amplifiers (MEA-PA), each MEA-PA including multiple amplifiers, multiple capacitors, and multiple enable circuits. Each amplifier has an input coupled to a common input node and an output coupled to a corresponding one of multiple intermediate nodes. Each capacitor has a first end coupled to an output node and a second end coupled to a corresponding intermediate node. The enable circuits are collectively controlled ...&lt;br /&gt;&lt;img src="http://feeds.feedburner.com/~r/Patentstorm-Patents-Amplifiers/~4/i8awN91SEss" height="1" width="1"/&gt;</description>
			         
			         <guid isPermaLink="false">8432219</guid>
			
			      <feedburner:origLink>http://www.patentstorm.us/patents/8432219/description.html</feedburner:origLink></item>
<item>
			         <title><![CDATA[Harmonic-rejection power amplifier]]></title>
			         <link>http://feedproxy.google.com/~r/Patentstorm-Patents-Amplifiers/~3/z8DRv-Ap1KE/description.html</link>
			         <description>&lt;ul&gt;&lt;li&gt;&lt;strong&gt;Patent Number:&lt;/strong&gt; &amp;nbsp;8432218&lt;/li&gt;&lt;li&gt;&lt;strong&gt;Publication Date:&lt;/strong&gt; &amp;nbsp;2013-04-30&lt;/li&gt;&lt;li&gt;&lt;strong&gt;Inventors:&lt;/strong&gt; &amp;nbsp;; &lt;/li&gt;&lt;/ul&gt;
&lt;p&gt;A harmonic-rejection power amplifier is disclosed. In an embodiment, the harmonic-rejection power amplifier includes a plurality of stages, each stage comprising a respective signal-generation component coupled to a respective power amplifier, wherein the respective signal-generation component is configured to output a respective signal having a respective phase, and wherein the respective power amplifier is configured to output an amplified version of the respective signal. In the ...&lt;br /&gt;&lt;img src="http://feeds.feedburner.com/~r/Patentstorm-Patents-Amplifiers/~4/z8DRv-Ap1KE" height="1" width="1"/&gt;</description>
			         
			         <guid isPermaLink="false">8432218</guid>
			
			      <feedburner:origLink>http://www.patentstorm.us/patents/8432218/description.html</feedburner:origLink></item>
<item>
			         <title><![CDATA[Amplifier]]></title>
			         <link>http://feedproxy.google.com/~r/Patentstorm-Patents-Amplifiers/~3/nfBfX4-qNi8/description.html</link>
			         <description>&lt;ul&gt;&lt;li&gt;&lt;strong&gt;Patent Number:&lt;/strong&gt; &amp;nbsp;8432217&lt;/li&gt;&lt;li&gt;&lt;strong&gt;Publication Date:&lt;/strong&gt; &amp;nbsp;2013-04-30&lt;/li&gt;&lt;li&gt;&lt;strong&gt;Inventors:&lt;/strong&gt; &amp;nbsp;; &lt;/li&gt;&lt;/ul&gt;
&lt;p&gt;A configurable low noise amplifier circuit which is configurable between a first topology in which the low noise amplifier circuit includes a degeneration inductance stage whereby the low noise amplifier circuit operates as an inductively degenerated low noise amplifier, and a second topology in which the low noise amplifier circuit includes a common-gate low noise amplifier stage whereby the low noise amplifier circuit operates as a common-gate low noise amplifier. The second topology ...&lt;br /&gt;&lt;img src="http://feeds.feedburner.com/~r/Patentstorm-Patents-Amplifiers/~4/nfBfX4-qNi8" height="1" width="1"/&gt;</description>
			         
			         <guid isPermaLink="false">8432217</guid>
			
			      <feedburner:origLink>http://www.patentstorm.us/patents/8432217/description.html</feedburner:origLink></item>
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