The videos might look a bit cryptic for people who have not been exposed to previous presentations (talks and posters). Well, you will not have to wait much longer: the BU team, in collaboration with the HP team, has several publications in the pipeline to document the details of our work.

In the meantime, enjoy this talk.

PART 1

PART 2

PART 3

From the articles, we learn that HP and Hynix will build memristors-based computer memories, with the goal of making the new technology commercially available in about three years. As Neurdon readers know, memristor main application is for dense nonvolatile memories. This technology can be a likely candidate to substitute current flash memory cards for products like cameras, cell phones, and PCs, and possibly beyond. What makes us even more excited is the fact that this substrate will be used as well for advancing neural simulations, and open up new, uncharted territories in the scale, miniaturization, and portability of neural models. It is nice to learn that a commercialization roadmap has been put in place that will facilitate the development of such technology. More info on this can be found in the CNN and NYT posts.

In the announcement Rice University researchers claim they have built reliable small digital switches that could allow to significantly shrink computer memory. From the same post, we learn that “HP is to announce on Tuesday that it will enter into a commercial partnership with a major semiconductor company to produce a related technology that also has the potential of pushing computer data storage to astronomical densities in the next decade”. This announcement, in conjunction with similar ones involving IBM and Intel, is symptomatic of an incoming race in novel materials for computer memory. At the advantage, of course, not only of the winning company, but also the final consumers. If you want to learn more, click here.

This is surely the case for Vissee, a Lugano based company co-funded by two neuromorphic engineers, Nicola Rohrseitz and Valeria Mozzetti. This interesting IEEE Spectrum post describes the main rational of how replicating some key functional properties of the visual system of the fruit fly can help solve the issue of precisely measuring speed. One interesting aspect to note is that, while the algorithm is designed taking inspiration from mother nature, and precisely how networks of neurons extract speed information by a clever choice of spatial and temporal response properties, as well as their wiring, the resulting chip does not need to exactly replicate this anatomy and physiology to work properly.

This is important, as mature and widely available digital technologies, when appropriately used, can be employed to quickly and inexpensively implement biomimetic computing, especially at small scales, such as in the case of the Vissee sensor. Developing a set of tools able to translate biologically inspired algorithms to the growing body of technologies (ranging from GPUs to more exotic, high-risk high-reward chips) that is being developed in several research labs in companies and academic institutions can be a transformative factor in neuromorphic technology, and not only.

More recently, neuromorphic engineers have been able to create more complex circuits that are better at emulating human senses capturing more of the dynamics and behaviors of their biological counterparts (Culurciello 2006, Zaghloul 2006, Hamilton 2008, Wen 2009) as a result of advances in integrated circuit technologies. As silicon engineering technology continues to improve, they move beyond sensory modalities to implementing various cortical areas.

There are over a hundred billion neurons and over a hundred trillion interconnections between them in the human brain. Designing parts of the cortex therefore requires a network of millions of neurons with billions of connections. This means that the silicon neuron must be compact (small area) and efficient (low power) so that as many of them as possible can be put on a single silicon chip. They must also be robust, able to generate most of the spiking and bursting patterns of biological neurons.

On the one hand, there are the simple models which are basic integrate-and-fire neurons. They integrate synaptic inputs onto the membrane capacitor and generate action potentials when the membrane voltage exceeds a preset threshold. At the other extreme are the Hodgkin-Huxley type models which capture the details of ion currents and conductances in the neuron. A tradeoff exists between the neuron complexity and the behavior of the model. A detailed neuron description is usually large and inefficient which allows for the implementation of only a simple network while a simple neuron description is usually not robust enough to emulate the dynamics of biological neurons.

The Izhikevich (Izhikevich 2003), Mihalas-Niebur (Mihalas 2009) and similar models lie between these extremes. They are curve-fitting models capable of producing the twenty known features of biological neurons. The configuration parameters of the Mihalas-Niebur model have biophysical meanings. In addition, its equations are also completely linear making it very efficient in its implementation. An array of M-N neurons (IFAT 3G) has been implemented in a 3D CMOS process to capture the 3D interconnections, parallel processing and computation observed in biological neurons (Folowosele 2009). The silicon neurons were placed on one layer, synapses and interconnections on the second layer and the communications circuitry on the third layer (Figure 1).

Other large arrays of neurons have been designed to emulate networks of biological neurons (Goldberg 2001, Indiveri 2004, Zou 2006, Ros 2006, Arthur 2006, Taba 2006, Horiuchi 2001, Paz 2005, Choi 2005, Serrano-Gotarredona 2006). Many of these arrays are specific to neural processes such as spatial frequency and orientation (Choi 2005), acoustic localization (Horiuchi 2001) and retinotopic maps (Taba 2006), while others can be adapted to multiple tasks (Goldberg 2001, Vogelstein 2007a, Indiveri 2004, Paz 2005).

More recently, large systems are being put together which consists of multiple chips. The CAVIAR system consists of four chips, each containing an array of neurons. The largest system of neuromorphic chips working together to solve a common problem, CAVIAR has about 45,000 neurons and 5 million synapses (see http://www.ini.uzh.ch/~tobi/caviar/). The wafer-scale array of silicon neurons by the FACETS consortium (schemmel2008a) consists of chips with 512 neurons and 256 synapses. When finished, it is expected to have over 200,000 neurons on it (see https://facets.kip.uni-heidelberg.de/index.html). Before this happens however, the system efficiency, power consumption, and fabrication yield must be improved. Neurogrid designed by The Brains in Silicon group at Stanford University consists of 16 VLSI chips which simulate over a million neurons in real time while consuming a power of only 1W. Neurogrid requires many parameters and is sensitive to variations in the fabrication process. Nonetheless, it is a remarkable feat given the large number of analog neuromorphic neurons which are connected via a state of the art asynchronous communications protocol (see http://www.stanford.edu/group/brainsinsilicon/). 

The 4^th generation Johns Hopkins University system (IFAT 4G) will consist of over 60,000 neurons (10 chips) with 120 million fully programmable synaptic connections. Unlike the other systems, it is able to achieve unlimited connectivity and reprogrammability by not having hardwired connections between neurons. Instead network topologies and synaptic parameters are stored in a RAM lookup table that is accessed by a field programmable gate array (FPGA) which routes spikes between the neurons. The individual neuron chips have been implemented on a 9 mm2 chip in an old technology (0.5um CMOS).   Clearly, the over 6K neurons per chip can be easily increased by a factor of ~100 by using a larger chip area and a state of the art process.  Two neuron models can be implemented – a leaky integrate-and-fire model or an adaptive threshold model based on the Mihalas-Niebur neuron model.   To date (2010), an earlier version of the IFAT (IFAT 2G) with approximately 10,000 neurons (with little mismatch) has been used to implement a small example of the HMAX visual cortex model for spike-based object recognition (see http://etienne.ece.jhu.edu/ projects /ifat/index.html). With the increased size, the communications between the neurons will have to be locally parallelized in order to increase network capacity.  The need for the routing FPGA (distributed to improve routing bandwidth) will also limit how low the power can be reduced.

These neural arrays and neuromorphic systems will serve as a platform for testing various theories of the functions, computations and organization in parts of the nervous system. Thus providing a better understanding of the biology and aiding in the development of neural prostheses. In addition, more robots can be designed with parts that emulate the nervous system leading to more intelligent robots that are able to interact with their environment with only limited human involvement.

References

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In an earlier posting I presented arguments of why the idea of the memristor as a fourth fundamental circuit element is likely to be wrong. However, regardless of whether or not the memristor is considered as a fundamental circuit element, one may ask if it is technically correct to say that the researchers from HPLabs actually did discover a memristor.

It is true that the 2008 article The missing memristor found did present a simple physical model based on ionic oxygen vacancy drift which match the basic equations used to define a memristor. However, this proposed memristor model ignored effects such as non-linear ionic mobility, charge trapping, electroformation, quantum tunneling, and Schottky-Mott barriers that occur at metal-semiconductor junctions and which are necessary for accurate modeling of metal-insulator-metal devices that exhibit resistive switching effects. In more realistic models (such as in the 2008 article Memristive switching mechanism for metal/oxide/metal nanodevice) the model is no longer describable in terms of a memristor but must be described by the broader class of memristive systems originally defined by Leon Chua and Steve Kang a few years after the original memristor paper.

Currently proposed memristive systems models (such as described in the SPICE model of the previous post) actually involve an exponential relationship between the change in state (dw/dt) and the voltage (or current). In an actual memristor such dependence is linear (e.g. dw/dt=i). This actually makes the comparison between the practical memristive models and the ideal memristor model similar to the comparison between the models for diodes and the model used for linear resistors. So realistically, it is inaccurate to state that the researchers at HPLabs “found” the missing memristor. What they did discover was that certain resistive switching devices can be successfully modeled using particular diode-like memristive systems models. This is particularly important since numerous other companies (e.g. Micron Technology, Samsung, Sharp, Unity Semiconductor) have been developing similar resistive switching memory devices over the past decade for commercial development in the form of RRAM. However, these companies have lacked a definitive mathematical model for their material systems.

In addition, just as the memristor is an incomplete representation of the more accurate diode-like memristive systems models, the diode-like memristive systems models may still be incomplete for modeling all dynamic memory effects in RRAM or neuromorphic designs. For example, in the 1968 article Switching Phenomena in Titanium Oxide Thin Films, switching effects were found not just in resistance but also in capacitance. Similar memory capacitive effects have also been noted in nanoparticle memristive films in the article Nanoparticle Assemblies as Memristors. While the capacitive effects may be negligible in cases where small electrode areas and/or low frequencies are used, other applications (e.g. high speed switching) may require models incorporating both memristance and memcapacitance.

 In fact, it is very likely that in the next few years several revised iterations of memristive, memcapacitive and various other similar dynamic memory models will be proposed for modeling RRAM and neuromorphic electronics. After all, despite the fact that the original concept for the field effect transistor was invented in the 1920’s (and developed in the 1950’s), models have continued to be advanced up to and including the present day to model more and more extreme cases due to nanometer scaling and sub-threshold conduction effects . It will be surprising if a similar pattern does not emerge for memory electronics as it continues to develop over the coming decades.

Okay, great, so BCI pubs are growing as fast as my full belly after a visit to Blue Ribbon Bar-B-Q, but has BCI research progressed in making the lives of those in need of such interfaces any easier? I would say “yes” and “no”. To my knowledge, The Wadsworth Center is currently the only institution offering in-home use of a BCI, and this is limited to people participating in their research studies. So, from a clinical perspective, there is a ways to go before people with locked-in syndrome or amyotrophic lateral sclerosis (ALS) can benefit from the research being done in the lab setting. One of the workshops at the BCI Meeting brought up this very topic — how do we overcome the hurdles of bringing EEG-based (the “easiest” of the methods available at the moment) BCI to users outside the controlled environment of a university lab? This is not an easy question to wrap up quickly. In fact, a large portion of the BCI community at the conference was working on at least some method for better removing artifacts in EEG data or optimally choosing electrodes that are user-specific rather than generalized to a larger population set. These sorts of adaptive algorithms are getting faster as well as integrating research from engineering, computer science, and neuroscience in new and interesting ways.

As for trends in BCI stimulus presentation paradigms, a once-over of the posters displayed at the BCI Meeting show that good ole P300 Speller is still the most widely used form of BCI. The P300 Speller has proven to be successfully used by various patient groups with relatively high accuracy for typing emails and other similar tasks, yet it has the drawback of being quite slow compared to non-BCI technology such as eye gaze tracking. Needless to say, the doors are wide open for someone to develop better methods other than P300 Spelling, sensorimotor rhythms (SMR), or steady-state visually-evoked potentials (SSVEP).

This leads me to discuss some BCI forecasts from the BCI Meeting. What doth the future bring? Cyborgs? A blurring of the line between man and machine? Robot wars?? Probably not. Addressing the comment above concerning better BCI methods, one promising avenue of research is that of hybrid BCIs (a topic which I will address in more detail at a later time) whereby different forms of brain and non-brain activated hardware could be used together. Gert Pfurtscheller and his team at TU Graz in Austria have written extensively on this topic recently.

Let’s look further into the crystal ball of BCI shall we? The most exciting new branch of BCI research comes to us from the electrocorticography (ECoG) realm. Several labs brought posters addressing the use of ECoG as a possible EEG alternative for BCI. ECoG is primarily used for patients suffering from epileptic seizures. Before surgery, some epileptic patients agree to short-term experiments while a temporary grid of electrodes are placed over the gray matter. ECoG gives much higher resolution and signal-to-noise ratio than EEG and also renders far more reliable high gamma power, a frequency band thought to be important for motor-based decision making. ECoG BCI is in its infancy, yet I would be on the lookout for more to come from researchers investigating this invasive form of BCI.

First of all, for those not familiar with SPICE, I recommend downloading the free LTSPICE IV by Linear Technology. It is a light weight analog electronic circuit simulator, and the code written here will be compatible with it. The memristor model  is a subcircuit  comprising of several ideal components and a couple of math formulas.

Being an element with memory, a memristor requires a state variable w, which by normalization can be assumed to lie in the interval [0,1]. Let’s assume that the time derivative of w can be written in the separable form

dw/dt = a*f(w)*g(V),

where a is a constant, f and g are some functions and V is the voltage across the memristor. The window function f controls the way w changes in different parts of [0,1]. In our model f is hard-limited to the interval [0.05,0.95]  and satisfies

f(w) = 1-(2w-1)^2.

In other words the rate of change of w decreases as w tends to its minimum or maximum value. Note that without the hard-limiting the rate of change would go to zero, which would effectively make the memristor’s memory infinite. Let us now concentrate on the other function in the differential equation, namely g(V). The memristor investigated in [Yang et al.] programs very nonlinearly with respect to the voltage V, so  let us model it by a sinh-function as

g(V) = sinh(b*V).

Now, the trick to implement the dw/dt -law in SPICE is to model w as the voltage over a capacitor with capacitance, say, 1F. The change in w is then yielded by a voltage dependent current source (symbol G in SPICE) which adds or removes a certain amount of charge to w. This certain amount is, in turn, determined by computing the functions f and g.

In [Yang et al.] the I-V characteristics of the device were approximated by

I = w^n*c1*sinh(d1*V)+c2*(exp(d2*V)-1),

so let us use that expression as well. The implementation of the I-V characteristics in SPICE is straightforward: just add a voltage dependent current source with this value between the terminals of the device. The real problem is now to find appropriate values for the constants a,b,c1,c2,d1,d2 and n, and here we would need a lot of data to work with. In the following I use values that give a similar I-V curve than the one obtained from experiments. Altogether, the SPICE model hpmemristor.lib looks like

.SUBCKT hpmemristor P M PARAMS:
+ a=25 b=8 c1=9 c2=0.01 d1=2 d2=4 s=1u n=4 p=1 lmin=0.05 lmax=0.95
*State variable:
Gsv 0 w value={f(V(w),V(P,M))*g(V(P,M))}
Csv w 0 1
.IC V(w) 0.05
*Output:
Gmem P M value = {s*((V(w)**n)*c1*sinh(d1*V(P,M))+c2*(exp(d2*V(P,M))-1))}

*Auxiliary functions:
.func sign2(var) = {(sgn(var)+1)/2}
.func trunc(var1,var2) = {(sign2(var1-lmin)+sign2(var2))*(sign2(lmax-var1)+sign2(-var2))/2}
.func f(var1,var2) = {trunc(var1,var2)*(1-(2*var1-1)**(2*p))}
.func g(var) = {a*sinh(b*var)}

.ENDS hpmemristor

Pretty self-explanatory, right? Note that Gsv and Csv are the current source and capacitor needed in the state variable, respectively, while Gmem is the actual “output” current source of the memristor. More specifically,

Gsv 0 w value={f(V(w),V(P,M))*g(V(P,M))}

means that there is a current source between 0 (ground node) and some node called w, and its value is f(V(w),V(P,M))*g(V(P,M)) amps. The value  f(V(w),V(P,M))*g(V(P,M)) denotes the RHS of the differential equation, the constant a has been embedded in the function g, and f needs for a technical reason two variables (this has to do with limiting ourselves to [0.05,0.95]). V(x) gives the voltage of the node x respect to to ground and V(P,M) gives the voltage between the terminals of the memristor. Oh yes, one more thing: .IC V(x) 0.05 means that the initial value of w is assumed to be 0.05. Once you get the model running in LTSPICE, you should get an I-V curve looking something like

That’s it. With different choices for functions f and g (and different parameters) you can model all sorts of memristive devices.

But if the cell acts, after this fashion, as a whole, each part interacting of necessity with the rest, the same is certainly true of the entire multicellular organism: as Schwann said of old, in very precise and adequate words, “the whole organism subsists only by means of the reciprocal action of the single elementary parts.”  As Wilson says again, “the physiological autonomy of the individual cell falls into the background… and the apparently composite character which the multicellular organism may exhibit is owing to a secondary distribution of its energies among local centres of action.”  It is here that the homology breaks down which is so often drawn, and overdrawn, between the unicellular organism and the individual cell of the metazoon.

Whitman, Adam Sedgwick, and others have lost no opportunity of warning us against a too literal acceptation of the cell-theory, against the view that the multicellular organism is a colony (or as Haeckel called it, in the case of the plant, a “republic”) of independent units of life… Hofmeister and Sachs have taught us that in the plant the growth of the mass, the growth of the organ, is the primary fact, that “cell formation is a phenomenon very general in organic life, but still only of secondary significance.”  “Comparative embryology,” says Whitman, “reminds us at every turn that the organism dominates cell-formation, using for the same purpose one, several, or many cells, massing its material and directing its movements and shaping its organs, as if cells did not exist.”…

…Discussed almost wholly from the concrete, or morphological point of view, the question has for the most part been made to turn on whether actual protoplasmic continuity can be demonstrated between one cell and another, whether the organism be an actual reticulum, or syncytium.  But from the dynamical point of view the question is much simpler.  We then deal not with material continuity, not with little bridges of connecting protoplasm, but with a continuity of forces, a comprehensive field of force, which runs through and through the entire organism and is by no means restricted in its passage to a protoplasmic continuum… As Whitman says, “the fact that physiological unity is not broken by cell-boundaries is confirmed in so many ways that it must be accepted as one of the fundamental truths of biology.”

—D’Arcy Thompson, On Growth and Form: The Complete Revised Edition, pp. 343–345

The last paragraph is especially appropriate in light of a recent publication that gives evidence for a possible interaction between cortical network activity and its global, “endogenous electric field.”

The ARM processor is the most widely used 32-bit architecture in terms of units produced. Originally conceived as a processor for desktop personal computers, the relatively simple, low power ARM processors have become dominant in the mobile and embedded electronics market as relatively low cost and small microprocessors and microcontrollers. As of 2007, about 98 percent of the more than one billion mobile phones sold each year use at least one ARM processor.

As Furber was trying to implement processes such as associative memory, he found himself reinventing neural networks. “In the end I threw in the towel: ‘Blow this, what I’m interested in is neural networks”. The wise decision was then to read about it, and build a simulator for them.

It turns out that the path that Farber is taken in the design of the so-called SpiNNaker architecture is a wise one: as opposed to design “rigid” neural architecture in hardware, the choice is to use software to be as flexible as possible in terms of connectivity and neural dynamics. This comes at a cost of size a power, however: the post does not give much details, but chances are that such a system, based on clever, but still traditional, microprocessors, will be relatively heavy and power hungry.

In any case, this is an interesting post and surely worth a read.